FP6000 PROJECT MEMORANDUM #30
October 24, 1963
Revised May 25, 1264
Specification of Floating Point Arithaetic Unit
(Part of FP6002 and FP6004)
The following specification has been drawn up by Product Planning in conjunction
with Engineering. Revisions have been underlined.
W.R. Whittall
Product Planning
Computer Systems
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File


1.
1 of 3
Specification of Floating Point Arithmetic Unit
Floating Point Number Representation
Word n
38 bit binary fraction
Word n+1
9 bit binary exponent
				. . .A .						
r~								"~\s				v
	i	23			1	1 1		14	; I1 1 l;	8	—-—.
E	23			0	23			8		0
P 0				23	0			15		23
Fraction	Exponent	Exponent
Sign	Overflow	Sign
(Note 1)	(Note	2)
Note 1	This bit corresponds to the exponent overflow flip-flop in the floating
point arithmetic unit. Tne flip-flop will set if a floating point operation
causes exponent overflow or if the number used has a one in this position.
The flip-flop can be tested by using a ’’store" or "store and clear"
operation which sets the state of the flip-flop into the sign bit of word
N+l and sets the main machine overflow flip flop if exponent overflow
is set. Ihe flip-flop can be cleared by loading a number which does
not have a one in the sign bit of word NH or by using a "store and clear"
operation.
Note 2	Negative	exponents are represented in two's complement form. The
exponent sign bit is inverted, so that an exponent of -256 is represented
by nine zeros.
Note 3	If the final result of any operation (after making any corrections for
temporary fraction overflow or after normalizing) has an exponent of
-256 or less the whole of the floating point accumulator is cleared except
for the exponent overflow bit.